Update 2025-04-13_16:25:39

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2025-04-13 16:25:41 +02:00
commit 4c711360d3
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call "C:\Program Files (x86)\Microsoft Visual Studio 9.0\VC\vcvarsall.bat" amd64
ml64 /nologo /c /Fo switch_x64_masm.obj switch_x64_masm.asm

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/*
* this is the internal transfer function.
*
* HISTORY
* 07-Sep-16 Add clang support using x register naming. Fredrik Fornwall
* 13-Apr-13 Add support for strange GCC caller-save decisions
* 08-Apr-13 File creation. Michael Matz
*
* NOTES
*
* Simply save all callee saved registers
*
*/
#define STACK_REFPLUS 1
#ifdef SLP_EVAL
#define STACK_MAGIC 0
#define REGS_TO_SAVE "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", \
"x27", "x28", "x30" /* aka lr */, \
"v8", "v9", "v10", "v11", \
"v12", "v13", "v14", "v15"
/*
* Recall:
asm asm-qualifiers ( AssemblerTemplate
: OutputOperands
[ : InputOperands
[ : Clobbers ] ])
or (if asm-qualifiers contains 'goto')
asm asm-qualifiers ( AssemblerTemplate
: OutputOperands
: InputOperands
: Clobbers
: GotoLabels)
and OutputOperands are
[ [asmSymbolicName] ] constraint (cvariablename)
When a name is given, refer to it as ``%[the name]``.
When not given, ``%i`` where ``i`` is the zero-based index.
constraints starting with ``=`` means only writing; ``+`` means
reading and writing.
This is followed by ``r`` (must be register) or ``m`` (must be memory)
and these can be combined.
The ``cvariablename`` is actually an lvalue expression.
In AArch65, 31 general purpose registers. If named X0... they are
64-bit. If named W0... they are the bottom 32 bits of the
corresponding 64 bit register.
XZR and WZR are hardcoded to 0, and ignore writes.
Arguments are in X0..X7. C++ uses X0 for ``this``. X0 holds simple return
values (?)
Whenever a W register is written, the top half of the X register is zeroed.
*/
static int
slp_switch(void)
{
int err;
void *fp;
/* Windowz uses a 32-bit long on a 64-bit platform, unlike the rest of
the world, and in theory we can be compiled with GCC/llvm on 64-bit
windows. So we need a fixed-width type.
*/
int64_t *stackref, stsizediff;
__asm__ volatile ("" : : : REGS_TO_SAVE);
__asm__ volatile ("str x29, %0" : "=m"(fp) : : );
__asm__ ("mov %0, sp" : "=r" (stackref));
{
SLP_SAVE_STATE(stackref, stsizediff);
__asm__ volatile (
"add sp,sp,%0\n"
"add x29,x29,%0\n"
:
: "r" (stsizediff)
);
SLP_RESTORE_STATE();
/* SLP_SAVE_STATE macro contains some return statements
(of -1 and 1). It falls through only when
the return value of slp_save_state() is zero, which
is placed in x0.
In that case we (slp_switch) also want to return zero
(also in x0 of course).
Now, some GCC versions (seen with 4.8) think it's a
good idea to save/restore x0 around the call to
slp_restore_state(), instead of simply zeroing it
at the return below. But slp_restore_state
writes random values to the stack slot used for this
save/restore (from when it once was saved above in
SLP_SAVE_STATE, when it was still uninitialized), so
"restoring" that precious zero actually makes us
return random values. There are some ways to make
GCC not use that zero value in the normal return path
(e.g. making err volatile, but that costs a little
stack space), and the simplest is to call a function
that returns an unknown value (which happens to be zero),
so the saved/restored value is unused.
Thus, this line stores a 0 into the ``err`` variable
(which must be held in a register for this instruction,
of course). The ``w`` qualifier causes the instruction
to use W0 instead of X0, otherwise we get a warning
about a value size mismatch (because err is an int,
and aarch64 platforms are LP64: 32-bit int, 64 bit long
and pointer).
*/
__asm__ volatile ("mov %w0, #0" : "=r" (err));
}
__asm__ volatile ("ldr x29, %0" : : "m" (fp) :);
__asm__ volatile ("" : : : REGS_TO_SAVE);
return err;
}
#endif

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#define STACK_REFPLUS 1
#ifdef SLP_EVAL
#define STACK_MAGIC 0
#define REGS_TO_SAVE "$9", "$10", "$11", "$12", "$13", "$14", "$15", \
"$f2", "$f3", "$f4", "$f5", "$f6", "$f7", "$f8", "$f9"
static int
slp_switch(void)
{
int ret;
long *stackref, stsizediff;
__asm__ volatile ("" : : : REGS_TO_SAVE);
__asm__ volatile ("mov $30, %0" : "=r" (stackref) : );
{
SLP_SAVE_STATE(stackref, stsizediff);
__asm__ volatile (
"addq $30, %0, $30\n\t"
: /* no outputs */
: "r" (stsizediff)
);
SLP_RESTORE_STATE();
}
__asm__ volatile ("" : : : REGS_TO_SAVE);
__asm__ volatile ("mov $31, %0" : "=r" (ret) : );
return ret;
}
#endif

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/*
* this is the internal transfer function.
*
* HISTORY
* 3-May-13 Ralf Schmitt <ralf@systemexit.de>
* Add support for strange GCC caller-save decisions
* (ported from switch_aarch64_gcc.h)
* 18-Aug-11 Alexey Borzenkov <snaury@gmail.com>
* Correctly save rbp, csr and cw
* 01-Apr-04 Hye-Shik Chang <perky@FreeBSD.org>
* Ported from i386 to amd64.
* 24-Nov-02 Christian Tismer <tismer@tismer.com>
* needed to add another magic constant to insure
* that f in slp_eval_frame(PyFrameObject *f)
* STACK_REFPLUS will probably be 1 in most cases.
* gets included into the saved stack area.
* 17-Sep-02 Christian Tismer <tismer@tismer.com>
* after virtualizing stack save/restore, the
* stack size shrunk a bit. Needed to introduce
* an adjustment STACK_MAGIC per platform.
* 15-Sep-02 Gerd Woetzel <gerd.woetzel@GMD.DE>
* slightly changed framework for spark
* 31-Avr-02 Armin Rigo <arigo@ulb.ac.be>
* Added ebx, esi and edi register-saves.
* 01-Mar-02 Samual M. Rushing <rushing@ironport.com>
* Ported from i386.
*/
#define STACK_REFPLUS 1
#ifdef SLP_EVAL
/* #define STACK_MAGIC 3 */
/* the above works fine with gcc 2.96, but 2.95.3 wants this */
#define STACK_MAGIC 0
#define REGS_TO_SAVE "r12", "r13", "r14", "r15"
static int
slp_switch(void)
{
int err;
void* rbp;
void* rbx;
unsigned int csr;
unsigned short cw;
/* This used to be declared 'register', but that does nothing in
modern compilers and is explicitly forbidden in some new
standards. */
long *stackref, stsizediff;
__asm__ volatile ("" : : : REGS_TO_SAVE);
__asm__ volatile ("fstcw %0" : "=m" (cw));
__asm__ volatile ("stmxcsr %0" : "=m" (csr));
__asm__ volatile ("movq %%rbp, %0" : "=m" (rbp));
__asm__ volatile ("movq %%rbx, %0" : "=m" (rbx));
__asm__ ("movq %%rsp, %0" : "=g" (stackref));
{
SLP_SAVE_STATE(stackref, stsizediff);
__asm__ volatile (
"addq %0, %%rsp\n"
"addq %0, %%rbp\n"
:
: "r" (stsizediff)
);
SLP_RESTORE_STATE();
__asm__ volatile ("xorq %%rax, %%rax" : "=a" (err));
}
__asm__ volatile ("movq %0, %%rbx" : : "m" (rbx));
__asm__ volatile ("movq %0, %%rbp" : : "m" (rbp));
__asm__ volatile ("ldmxcsr %0" : : "m" (csr));
__asm__ volatile ("fldcw %0" : : "m" (cw));
__asm__ volatile ("" : : : REGS_TO_SAVE);
return err;
}
#endif
/*
* further self-processing support
*/
/*
* if you want to add self-inspection tools, place them
* here. See the x86_msvc for the necessary defines.
* These features are highly experimental und not
* essential yet.
*/

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/*
* this is the internal transfer function.
*
* HISTORY
* 14-Aug-06 File creation. Ported from Arm Thumb. Sylvain Baro
* 3-Sep-06 Commented out saving of r1-r3 (r4 already commented out) as I
* read that these do not need to be saved. Also added notes and
* errors related to the frame pointer. Richard Tew.
*
* NOTES
*
* It is not possible to detect if fp is used or not, so the supplied
* switch function needs to support it, so that you can remove it if
* it does not apply to you.
*
* POSSIBLE ERRORS
*
* "fp cannot be used in asm here"
*
* - Try commenting out "fp" in REGS_TO_SAVE.
*
*/
#define STACK_REFPLUS 1
#ifdef SLP_EVAL
#define STACK_MAGIC 0
#define REG_SP "sp"
#define REG_SPSP "sp,sp"
#ifdef __thumb__
#define REG_FP "r7"
#define REG_FPFP "r7,r7"
#define REGS_TO_SAVE_GENERAL "r4", "r5", "r6", "r8", "r9", "r10", "r11", "lr"
#else
#define REG_FP "fp"
#define REG_FPFP "fp,fp"
#define REGS_TO_SAVE_GENERAL "r4", "r5", "r6", "r7", "r8", "r9", "r10", "lr"
#endif
#if defined(__SOFTFP__)
#define REGS_TO_SAVE REGS_TO_SAVE_GENERAL
#elif defined(__VFP_FP__)
#define REGS_TO_SAVE REGS_TO_SAVE_GENERAL, "d8", "d9", "d10", "d11", \
"d12", "d13", "d14", "d15"
#elif defined(__MAVERICK__)
#define REGS_TO_SAVE REGS_TO_SAVE_GENERAL, "mvf4", "mvf5", "mvf6", "mvf7", \
"mvf8", "mvf9", "mvf10", "mvf11", \
"mvf12", "mvf13", "mvf14", "mvf15"
#else
#define REGS_TO_SAVE REGS_TO_SAVE_GENERAL, "f4", "f5", "f6", "f7"
#endif
static int
#ifdef __GNUC__
__attribute__((optimize("no-omit-frame-pointer")))
#endif
slp_switch(void)
{
void *fp;
int *stackref, stsizediff;
int result;
__asm__ volatile ("" : : : REGS_TO_SAVE);
__asm__ volatile ("mov r0," REG_FP "\n\tstr r0,%0" : "=m" (fp) : : "r0");
__asm__ ("mov %0," REG_SP : "=r" (stackref));
{
SLP_SAVE_STATE(stackref, stsizediff);
__asm__ volatile (
"add " REG_SPSP ",%0\n"
"add " REG_FPFP ",%0\n"
:
: "r" (stsizediff)
);
SLP_RESTORE_STATE();
}
__asm__ volatile ("ldr r0,%1\n\tmov " REG_FP ",r0\n\tmov %0, #0" : "=r" (result) : "m" (fp) : "r0");
__asm__ volatile ("" : : : REGS_TO_SAVE);
return result;
}
#endif

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/*
* this is the internal transfer function.
*
* HISTORY
* 31-May-15 iOS support. Ported from arm32. Proton <feisuzhu@163.com>
*
* NOTES
*
* It is not possible to detect if fp is used or not, so the supplied
* switch function needs to support it, so that you can remove it if
* it does not apply to you.
*
* POSSIBLE ERRORS
*
* "fp cannot be used in asm here"
*
* - Try commenting out "fp" in REGS_TO_SAVE.
*
*/
#define STACK_REFPLUS 1
#ifdef SLP_EVAL
#define STACK_MAGIC 0
#define REG_SP "sp"
#define REG_SPSP "sp,sp"
#define REG_FP "r7"
#define REG_FPFP "r7,r7"
#define REGS_TO_SAVE_GENERAL "r4", "r5", "r6", "r8", "r10", "r11", "lr"
#define REGS_TO_SAVE REGS_TO_SAVE_GENERAL, "d8", "d9", "d10", "d11", \
"d12", "d13", "d14", "d15"
static int
#ifdef __GNUC__
__attribute__((optimize("no-omit-frame-pointer")))
#endif
slp_switch(void)
{
void *fp;
int *stackref, stsizediff, result;
__asm__ volatile ("" : : : REGS_TO_SAVE);
__asm__ volatile ("str " REG_FP ",%0" : "=m" (fp));
__asm__ ("mov %0," REG_SP : "=r" (stackref));
{
SLP_SAVE_STATE(stackref, stsizediff);
__asm__ volatile (
"add " REG_SPSP ",%0\n"
"add " REG_FPFP ",%0\n"
:
: "r" (stsizediff)
: REGS_TO_SAVE /* Clobber registers, force compiler to
* recalculate address of void *fp from REG_SP or REG_FP */
);
SLP_RESTORE_STATE();
}
__asm__ volatile (
"ldr " REG_FP ", %1\n\t"
"mov %0, #0"
: "=r" (result)
: "m" (fp)
: REGS_TO_SAVE /* Force compiler to restore saved registers after this */
);
return result;
}
#endif

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AREA switch_arm64_masm, CODE, READONLY;
GLOBAL slp_switch [FUNC]
EXTERN slp_save_state_asm
EXTERN slp_restore_state_asm
slp_switch
; push callee saved registers to stack
stp x19, x20, [sp, #-16]!
stp x21, x22, [sp, #-16]!
stp x23, x24, [sp, #-16]!
stp x25, x26, [sp, #-16]!
stp x27, x28, [sp, #-16]!
stp x29, x30, [sp, #-16]!
stp d8, d9, [sp, #-16]!
stp d10, d11, [sp, #-16]!
stp d12, d13, [sp, #-16]!
stp d14, d15, [sp, #-16]!
; call slp_save_state_asm with stack pointer
mov x0, sp
bl slp_save_state_asm
; early return for return value of 1 and -1
cmp x0, #-1
b.eq RETURN
cmp x0, #1
b.eq RETURN
; increment stack and frame pointer
add sp, sp, x0
add x29, x29, x0
bl slp_restore_state_asm
; store return value for successful completion of routine
mov x0, #0
RETURN
; pop registers from stack
ldp d14, d15, [sp], #16
ldp d12, d13, [sp], #16
ldp d10, d11, [sp], #16
ldp d8, d9, [sp], #16
ldp x29, x30, [sp], #16
ldp x27, x28, [sp], #16
ldp x25, x26, [sp], #16
ldp x23, x24, [sp], #16
ldp x21, x22, [sp], #16
ldp x19, x20, [sp], #16
ret
END

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/*
* this is the internal transfer function.
*
* HISTORY
* 21-Oct-21 Niyas Sait <niyas.sait@linaro.org>
* First version to enable win/arm64 support.
*/
#define STACK_REFPLUS 1
#define STACK_MAGIC 0
/* Use the generic support for an external assembly language slp_switch function. */
#define EXTERNAL_ASM
#ifdef SLP_EVAL
/* This always uses the external masm assembly file. */
#endif

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#ifdef SLP_EVAL
#define STACK_MAGIC 0
#define REG_FP "r8"
#ifdef __CSKYABIV2__
#define REGS_TO_SAVE_GENERAL "r4", "r5", "r6", "r7", "r9", "r10", "r11", "r15",\
"r16", "r17", "r18", "r19", "r20", "r21", "r22",\
"r23", "r24", "r25"
#if defined (__CSKY_HARD_FLOAT__) || (__CSKY_VDSP__)
#define REGS_TO_SAVE REGS_TO_SAVE_GENERAL, "vr8", "vr9", "vr10", "vr11", "vr12",\
"vr13", "vr14", "vr15"
#else
#define REGS_TO_SAVE REGS_TO_SAVE_GENERAL
#endif
#else
#define REGS_TO_SAVE "r9", "r10", "r11", "r12", "r13", "r15"
#endif
static int
#ifdef __GNUC__
__attribute__((optimize("no-omit-frame-pointer")))
#endif
slp_switch(void)
{
int *stackref, stsizediff;
int result;
__asm__ volatile ("" : : : REGS_TO_SAVE);
__asm__ ("mov %0, sp" : "=r" (stackref));
{
SLP_SAVE_STATE(stackref, stsizediff);
__asm__ volatile (
"addu sp,%0\n"
"addu "REG_FP",%0\n"
:
: "r" (stsizediff)
);
SLP_RESTORE_STATE();
}
__asm__ volatile ("movi %0, 0" : "=r" (result));
__asm__ volatile ("" : : : REGS_TO_SAVE);
return result;
}
#endif

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#define STACK_REFPLUS 1
#ifdef SLP_EVAL
#define STACK_MAGIC 0
#define REGS_TO_SAVE "s0", "s1", "s2", "s3", "s4", "s5", \
"s6", "s7", "s8", "fp", \
"f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31"
static int
slp_switch(void)
{
int ret;
long *stackref, stsizediff;
__asm__ volatile ("" : : : REGS_TO_SAVE);
__asm__ volatile ("move %0, $sp" : "=r" (stackref) : );
{
SLP_SAVE_STATE(stackref, stsizediff);
__asm__ volatile (
"add.d $sp, $sp, %0\n\t"
: /* no outputs */
: "r" (stsizediff)
);
SLP_RESTORE_STATE();
}
__asm__ volatile ("" : : : REGS_TO_SAVE);
__asm__ volatile ("move %0, $zero" : "=r" (ret) : );
return ret;
}
#endif

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/*
* this is the internal transfer function.
*
* HISTORY
* 2014-01-06 Andreas Schwab <schwab@linux-m68k.org>
* File created.
*/
#ifdef SLP_EVAL
#define STACK_MAGIC 0
#define REGS_TO_SAVE "%d2", "%d3", "%d4", "%d5", "%d6", "%d7", \
"%a2", "%a3", "%a4"
static int
slp_switch(void)
{
int err;
int *stackref, stsizediff;
void *fp, *a5;
__asm__ volatile ("" : : : REGS_TO_SAVE);
__asm__ volatile ("move.l %%fp, %0" : "=m"(fp));
__asm__ volatile ("move.l %%a5, %0" : "=m"(a5));
__asm__ ("move.l %%sp, %0" : "=r"(stackref));
{
SLP_SAVE_STATE(stackref, stsizediff);
__asm__ volatile ("add.l %0, %%sp; add.l %0, %%fp" : : "r"(stsizediff));
SLP_RESTORE_STATE();
__asm__ volatile ("clr.l %0" : "=g" (err));
}
__asm__ volatile ("move.l %0, %%a5" : : "m"(a5));
__asm__ volatile ("move.l %0, %%fp" : : "m"(fp));
__asm__ volatile ("" : : : REGS_TO_SAVE);
return err;
}
#endif

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/*
* this is the internal transfer function.
*
* HISTORY
* 20-Sep-14 Matt Madison <madison@bliss-m.org>
* Re-code the saving of the gp register for MIPS64.
* 05-Jan-08 Thiemo Seufer <ths@debian.org>
* Ported from ppc.
*/
#define STACK_REFPLUS 1
#ifdef SLP_EVAL
#define STACK_MAGIC 0
#define REGS_TO_SAVE "$16", "$17", "$18", "$19", "$20", "$21", "$22", \
"$23", "$30"
static int
slp_switch(void)
{
int err;
int *stackref, stsizediff;
#ifdef __mips64
uint64_t gpsave;
#endif
__asm__ __volatile__ ("" : : : REGS_TO_SAVE);
#ifdef __mips64
__asm__ __volatile__ ("sd $28,%0" : "=m" (gpsave) : : );
#endif
__asm__ ("move %0, $29" : "=r" (stackref) : );
{
SLP_SAVE_STATE(stackref, stsizediff);
__asm__ __volatile__ (
#ifdef __mips64
"daddu $29, %0\n"
#else
"addu $29, %0\n"
#endif
: /* no outputs */
: "r" (stsizediff)
);
SLP_RESTORE_STATE();
}
#ifdef __mips64
__asm__ __volatile__ ("ld $28,%0" : : "m" (gpsave) : );
#endif
__asm__ __volatile__ ("" : : : REGS_TO_SAVE);
__asm__ __volatile__ ("move %0, $0" : "=r" (err));
return err;
}
#endif
/*
* further self-processing support
*/
/*
* if you want to add self-inspection tools, place them
* here. See the x86_msvc for the necessary defines.
* These features are highly experimental und not
* essential yet.
*/

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/*
* this is the internal transfer function.
*
* HISTORY
* 16-Oct-20 Jesse Gorzinski <jgorzins@us.ibm.com>
* Copied from Linux PPC64 implementation
* 04-Sep-18 Alexey Borzenkov <snaury@gmail.com>
* Workaround a gcc bug using manual save/restore of r30
* 21-Mar-18 Tulio Magno Quites Machado Filho <tuliom@linux.vnet.ibm.com>
* Added r30 to the list of saved registers in order to fully comply with
* both ppc64 ELFv1 ABI and the ppc64le ELFv2 ABI, that classify this
* register as a nonvolatile register used for local variables.
* 21-Mar-18 Laszlo Boszormenyi <gcs@debian.org>
* Save r2 (TOC pointer) manually.
* 10-Dec-13 Ulrich Weigand <uweigand@de.ibm.com>
* Support ELFv2 ABI. Save float/vector registers.
* 09-Mar-12 Michael Ellerman <michael@ellerman.id.au>
* 64-bit implementation, copied from 32-bit.
* 07-Sep-05 (py-dev mailing list discussion)
* removed 'r31' from the register-saved. !!!! WARNING !!!!
* It means that this file can no longer be compiled statically!
* It is now only suitable as part of a dynamic library!
* 14-Jan-04 Bob Ippolito <bob@redivi.com>
* added cr2-cr4 to the registers to be saved.
* Open questions: Should we save FP registers?
* What about vector registers?
* Differences between darwin and unix?
* 24-Nov-02 Christian Tismer <tismer@tismer.com>
* needed to add another magic constant to insure
* that f in slp_eval_frame(PyFrameObject *f)
* STACK_REFPLUS will probably be 1 in most cases.
* gets included into the saved stack area.
* 04-Oct-02 Gustavo Niemeyer <niemeyer@conectiva.com>
* Ported from MacOS version.
* 17-Sep-02 Christian Tismer <tismer@tismer.com>
* after virtualizing stack save/restore, the
* stack size shrunk a bit. Needed to introduce
* an adjustment STACK_MAGIC per platform.
* 15-Sep-02 Gerd Woetzel <gerd.woetzel@GMD.DE>
* slightly changed framework for sparc
* 29-Jun-02 Christian Tismer <tismer@tismer.com>
* Added register 13-29, 31 saves. The same way as
* Armin Rigo did for the x86_unix version.
* This seems to be now fully functional!
* 04-Mar-02 Hye-Shik Chang <perky@fallin.lv>
* Ported from i386.
* 31-Jul-12 Trevor Bowen <trevorbowen@gmail.com>
* Changed memory constraints to register only.
*/
#define STACK_REFPLUS 1
#ifdef SLP_EVAL
#define STACK_MAGIC 6
#if defined(__ALTIVEC__)
#define ALTIVEC_REGS \
"v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", \
"v28", "v29", "v30", "v31",
#else
#define ALTIVEC_REGS
#endif
#define REGS_TO_SAVE "r14", "r15", "r16", "r17", "r18", "r19", "r20", \
"r21", "r22", "r23", "r24", "r25", "r26", "r27", "r28", "r29", \
"r31", \
"fr14", "fr15", "fr16", "fr17", "fr18", "fr19", "fr20", "fr21", \
"fr22", "fr23", "fr24", "fr25", "fr26", "fr27", "fr28", "fr29", \
"fr30", "fr31", \
ALTIVEC_REGS \
"cr2", "cr3", "cr4"
static int
slp_switch(void)
{
int err;
long *stackref, stsizediff;
void * toc;
void * r30;
__asm__ volatile ("" : : : REGS_TO_SAVE);
__asm__ volatile ("std 2, %0" : "=m" (toc));
__asm__ volatile ("std 30, %0" : "=m" (r30));
__asm__ ("mr %0, 1" : "=r" (stackref) : );
{
SLP_SAVE_STATE(stackref, stsizediff);
__asm__ volatile (
"mr 11, %0\n"
"add 1, 1, 11\n"
: /* no outputs */
: "r" (stsizediff)
: "11"
);
SLP_RESTORE_STATE();
}
__asm__ volatile ("ld 30, %0" : : "m" (r30));
__asm__ volatile ("ld 2, %0" : : "m" (toc));
__asm__ volatile ("" : : : REGS_TO_SAVE);
__asm__ volatile ("li %0, 0" : "=r" (err));
return err;
}
#endif

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/*
* this is the internal transfer function.
*
* HISTORY
* 04-Sep-18 Alexey Borzenkov <snaury@gmail.com>
* Workaround a gcc bug using manual save/restore of r30
* 21-Mar-18 Tulio Magno Quites Machado Filho <tuliom@linux.vnet.ibm.com>
* Added r30 to the list of saved registers in order to fully comply with
* both ppc64 ELFv1 ABI and the ppc64le ELFv2 ABI, that classify this
* register as a nonvolatile register used for local variables.
* 21-Mar-18 Laszlo Boszormenyi <gcs@debian.org>
* Save r2 (TOC pointer) manually.
* 10-Dec-13 Ulrich Weigand <uweigand@de.ibm.com>
* Support ELFv2 ABI. Save float/vector registers.
* 09-Mar-12 Michael Ellerman <michael@ellerman.id.au>
* 64-bit implementation, copied from 32-bit.
* 07-Sep-05 (py-dev mailing list discussion)
* removed 'r31' from the register-saved. !!!! WARNING !!!!
* It means that this file can no longer be compiled statically!
* It is now only suitable as part of a dynamic library!
* 14-Jan-04 Bob Ippolito <bob@redivi.com>
* added cr2-cr4 to the registers to be saved.
* Open questions: Should we save FP registers?
* What about vector registers?
* Differences between darwin and unix?
* 24-Nov-02 Christian Tismer <tismer@tismer.com>
* needed to add another magic constant to insure
* that f in slp_eval_frame(PyFrameObject *f)
* STACK_REFPLUS will probably be 1 in most cases.
* gets included into the saved stack area.
* 04-Oct-02 Gustavo Niemeyer <niemeyer@conectiva.com>
* Ported from MacOS version.
* 17-Sep-02 Christian Tismer <tismer@tismer.com>
* after virtualizing stack save/restore, the
* stack size shrunk a bit. Needed to introduce
* an adjustment STACK_MAGIC per platform.
* 15-Sep-02 Gerd Woetzel <gerd.woetzel@GMD.DE>
* slightly changed framework for sparc
* 29-Jun-02 Christian Tismer <tismer@tismer.com>
* Added register 13-29, 31 saves. The same way as
* Armin Rigo did for the x86_unix version.
* This seems to be now fully functional!
* 04-Mar-02 Hye-Shik Chang <perky@fallin.lv>
* Ported from i386.
* 31-Jul-12 Trevor Bowen <trevorbowen@gmail.com>
* Changed memory constraints to register only.
*/
#define STACK_REFPLUS 1
#ifdef SLP_EVAL
#if _CALL_ELF == 2
#define STACK_MAGIC 4
#else
#define STACK_MAGIC 6
#endif
#if defined(__ALTIVEC__)
#define ALTIVEC_REGS \
"v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", \
"v28", "v29", "v30", "v31",
#else
#define ALTIVEC_REGS
#endif
#define REGS_TO_SAVE "r14", "r15", "r16", "r17", "r18", "r19", "r20", \
"r21", "r22", "r23", "r24", "r25", "r26", "r27", "r28", "r29", \
"r31", \
"fr14", "fr15", "fr16", "fr17", "fr18", "fr19", "fr20", "fr21", \
"fr22", "fr23", "fr24", "fr25", "fr26", "fr27", "fr28", "fr29", \
"fr30", "fr31", \
ALTIVEC_REGS \
"cr2", "cr3", "cr4"
static int
slp_switch(void)
{
int err;
long *stackref, stsizediff;
void * toc;
void * r30;
__asm__ volatile ("" : : : REGS_TO_SAVE);
__asm__ volatile ("std 2, %0" : "=m" (toc));
__asm__ volatile ("std 30, %0" : "=m" (r30));
__asm__ ("mr %0, 1" : "=r" (stackref) : );
{
SLP_SAVE_STATE(stackref, stsizediff);
__asm__ volatile (
"mr 11, %0\n"
"add 1, 1, 11\n"
: /* no outputs */
: "r" (stsizediff)
: "11"
);
SLP_RESTORE_STATE();
}
__asm__ volatile ("ld 30, %0" : : "m" (r30));
__asm__ volatile ("ld 2, %0" : : "m" (toc));
__asm__ volatile ("" : : : REGS_TO_SAVE);
__asm__ volatile ("li %0, 0" : "=r" (err));
return err;
}
#endif

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/*
* this is the internal transfer function.
*
* HISTORY
* 07-Mar-11 Floris Bruynooghe <flub@devork.be>
* Do not add stsizediff to general purpose
* register (GPR) 30 as this is a non-volatile and
* unused by the PowerOpen Environment, therefore
* this was modifying a user register instead of the
* frame pointer (which does not seem to exist).
* 07-Sep-05 (py-dev mailing list discussion)
* removed 'r31' from the register-saved. !!!! WARNING !!!!
* It means that this file can no longer be compiled statically!
* It is now only suitable as part of a dynamic library!
* 14-Jan-04 Bob Ippolito <bob@redivi.com>
* added cr2-cr4 to the registers to be saved.
* Open questions: Should we save FP registers?
* What about vector registers?
* Differences between darwin and unix?
* 24-Nov-02 Christian Tismer <tismer@tismer.com>
* needed to add another magic constant to insure
* that f in slp_eval_frame(PyFrameObject *f)
* STACK_REFPLUS will probably be 1 in most cases.
* gets included into the saved stack area.
* 04-Oct-02 Gustavo Niemeyer <niemeyer@conectiva.com>
* Ported from MacOS version.
* 17-Sep-02 Christian Tismer <tismer@tismer.com>
* after virtualizing stack save/restore, the
* stack size shrunk a bit. Needed to introduce
* an adjustment STACK_MAGIC per platform.
* 15-Sep-02 Gerd Woetzel <gerd.woetzel@GMD.DE>
* slightly changed framework for sparc
* 29-Jun-02 Christian Tismer <tismer@tismer.com>
* Added register 13-29, 31 saves. The same way as
* Armin Rigo did for the x86_unix version.
* This seems to be now fully functional!
* 04-Mar-02 Hye-Shik Chang <perky@fallin.lv>
* Ported from i386.
*/
#define STACK_REFPLUS 1
#ifdef SLP_EVAL
#define STACK_MAGIC 3
/* !!!!WARNING!!!! need to add "r31" in the next line if this header file
* is meant to be compiled non-dynamically!
*/
#define REGS_TO_SAVE "r13", "r14", "r15", "r16", "r17", "r18", "r19", "r20", \
"r21", "r22", "r23", "r24", "r25", "r26", "r27", "r28", "r29", \
"cr2", "cr3", "cr4"
static int
slp_switch(void)
{
int err;
int *stackref, stsizediff;
__asm__ volatile ("" : : : REGS_TO_SAVE);
__asm__ ("mr %0, 1" : "=r" (stackref) : );
{
SLP_SAVE_STATE(stackref, stsizediff);
__asm__ volatile (
"mr 11, %0\n"
"add 1, 1, 11\n"
: /* no outputs */
: "r" (stsizediff)
: "11"
);
SLP_RESTORE_STATE();
}
__asm__ volatile ("" : : : REGS_TO_SAVE);
__asm__ volatile ("li %0, 0" : "=r" (err));
return err;
}
#endif
/*
* further self-processing support
*/
/*
* if you want to add self-inspection tools, place them
* here. See the x86_msvc for the necessary defines.
* These features are highly experimental und not
* essential yet.
*/

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/*
* this is the internal transfer function.
*
* HISTORY
* 07-Sep-05 (py-dev mailing list discussion)
* removed 'r31' from the register-saved. !!!! WARNING !!!!
* It means that this file can no longer be compiled statically!
* It is now only suitable as part of a dynamic library!
* 14-Jan-04 Bob Ippolito <bob@redivi.com>
* added cr2-cr4 to the registers to be saved.
* Open questions: Should we save FP registers?
* What about vector registers?
* Differences between darwin and unix?
* 24-Nov-02 Christian Tismer <tismer@tismer.com>
* needed to add another magic constant to insure
* that f in slp_eval_frame(PyFrameObject *f)
* STACK_REFPLUS will probably be 1 in most cases.
* gets included into the saved stack area.
* 04-Oct-02 Gustavo Niemeyer <niemeyer@conectiva.com>
* Ported from MacOS version.
* 17-Sep-02 Christian Tismer <tismer@tismer.com>
* after virtualizing stack save/restore, the
* stack size shrunk a bit. Needed to introduce
* an adjustment STACK_MAGIC per platform.
* 15-Sep-02 Gerd Woetzel <gerd.woetzel@GMD.DE>
* slightly changed framework for sparc
* 29-Jun-02 Christian Tismer <tismer@tismer.com>
* Added register 13-29, 31 saves. The same way as
* Armin Rigo did for the x86_unix version.
* This seems to be now fully functional!
* 04-Mar-02 Hye-Shik Chang <perky@fallin.lv>
* Ported from i386.
* 31-Jul-12 Trevor Bowen <trevorbowen@gmail.com>
* Changed memory constraints to register only.
*/
#define STACK_REFPLUS 1
#ifdef SLP_EVAL
#define STACK_MAGIC 3
/* !!!!WARNING!!!! need to add "r31" in the next line if this header file
* is meant to be compiled non-dynamically!
*/
#define REGS_TO_SAVE "r13", "r14", "r15", "r16", "r17", "r18", "r19", "r20", \
"r21", "r22", "r23", "r24", "r25", "r26", "r27", "r28", "r29", \
"cr2", "cr3", "cr4"
static int
slp_switch(void)
{
int err;
int *stackref, stsizediff;
__asm__ volatile ("" : : : REGS_TO_SAVE);
__asm__ ("mr %0, 1" : "=r" (stackref) : );
{
SLP_SAVE_STATE(stackref, stsizediff);
__asm__ volatile (
"mr 11, %0\n"
"add 1, 1, 11\n"
"add 30, 30, 11\n"
: /* no outputs */
: "r" (stsizediff)
: "11"
);
SLP_RESTORE_STATE();
}
__asm__ volatile ("" : : : REGS_TO_SAVE);
__asm__ volatile ("li %0, 0" : "=r" (err));
return err;
}
#endif
/*
* further self-processing support
*/
/*
* if you want to add self-inspection tools, place them
* here. See the x86_msvc for the necessary defines.
* These features are highly experimental und not
* essential yet.
*/

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/*
* this is the internal transfer function.
*
* HISTORY
* 07-Sep-05 (py-dev mailing list discussion)
* removed 'r31' from the register-saved. !!!! WARNING !!!!
* It means that this file can no longer be compiled statically!
* It is now only suitable as part of a dynamic library!
* 14-Jan-04 Bob Ippolito <bob@redivi.com>
* added cr2-cr4 to the registers to be saved.
* Open questions: Should we save FP registers?
* What about vector registers?
* Differences between darwin and unix?
* 24-Nov-02 Christian Tismer <tismer@tismer.com>
* needed to add another magic constant to insure
* that f in slp_eval_frame(PyFrameObject *f)
* STACK_REFPLUS will probably be 1 in most cases.
* gets included into the saved stack area.
* 17-Sep-02 Christian Tismer <tismer@tismer.com>
* after virtualizing stack save/restore, the
* stack size shrunk a bit. Needed to introduce
* an adjustment STACK_MAGIC per platform.
* 15-Sep-02 Gerd Woetzel <gerd.woetzel@GMD.DE>
* slightly changed framework for sparc
* 29-Jun-02 Christian Tismer <tismer@tismer.com>
* Added register 13-29, 31 saves. The same way as
* Armin Rigo did for the x86_unix version.
* This seems to be now fully functional!
* 04-Mar-02 Hye-Shik Chang <perky@fallin.lv>
* Ported from i386.
*/
#define STACK_REFPLUS 1
#ifdef SLP_EVAL
#define STACK_MAGIC 3
/* !!!!WARNING!!!! need to add "r31" in the next line if this header file
* is meant to be compiled non-dynamically!
*/
#define REGS_TO_SAVE "r13", "r14", "r15", "r16", "r17", "r18", "r19", "r20", \
"r21", "r22", "r23", "r24", "r25", "r26", "r27", "r28", "r29", \
"cr2", "cr3", "cr4"
static int
slp_switch(void)
{
int err;
int *stackref, stsizediff;
__asm__ volatile ("" : : : REGS_TO_SAVE);
__asm__ ("; asm block 2\n\tmr %0, r1" : "=r" (stackref) : );
{
SLP_SAVE_STATE(stackref, stsizediff);
__asm__ volatile (
"; asm block 3\n"
"\tmr r11, %0\n"
"\tadd r1, r1, r11\n"
"\tadd r30, r30, r11\n"
: /* no outputs */
: "r" (stsizediff)
: "r11"
);
SLP_RESTORE_STATE();
}
__asm__ volatile ("" : : : REGS_TO_SAVE);
__asm__ volatile ("li %0, 0" : "=r" (err));
return err;
}
#endif
/*
* further self-processing support
*/
/*
* if you want to add self-inspection tools, place them
* here. See the x86_msvc for the necessary defines.
* These features are highly experimental und not
* essential yet.
*/

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/*
* this is the internal transfer function.
*
* HISTORY
* 07-Sep-05 (py-dev mailing list discussion)
* removed 'r31' from the register-saved. !!!! WARNING !!!!
* It means that this file can no longer be compiled statically!
* It is now only suitable as part of a dynamic library!
* 14-Jan-04 Bob Ippolito <bob@redivi.com>
* added cr2-cr4 to the registers to be saved.
* Open questions: Should we save FP registers?
* What about vector registers?
* Differences between darwin and unix?
* 24-Nov-02 Christian Tismer <tismer@tismer.com>
* needed to add another magic constant to insure
* that f in slp_eval_frame(PyFrameObject *f)
* STACK_REFPLUS will probably be 1 in most cases.
* gets included into the saved stack area.
* 04-Oct-02 Gustavo Niemeyer <niemeyer@conectiva.com>
* Ported from MacOS version.
* 17-Sep-02 Christian Tismer <tismer@tismer.com>
* after virtualizing stack save/restore, the
* stack size shrunk a bit. Needed to introduce
* an adjustment STACK_MAGIC per platform.
* 15-Sep-02 Gerd Woetzel <gerd.woetzel@GMD.DE>
* slightly changed framework for sparc
* 29-Jun-02 Christian Tismer <tismer@tismer.com>
* Added register 13-29, 31 saves. The same way as
* Armin Rigo did for the x86_unix version.
* This seems to be now fully functional!
* 04-Mar-02 Hye-Shik Chang <perky@fallin.lv>
* Ported from i386.
*/
#define STACK_REFPLUS 1
#ifdef SLP_EVAL
#define STACK_MAGIC 3
/* !!!!WARNING!!!! need to add "r31" in the next line if this header file
* is meant to be compiled non-dynamically!
*/
#define REGS_TO_SAVE "r13", "r14", "r15", "r16", "r17", "r18", "r19", "r20", \
"r21", "r22", "r23", "r24", "r25", "r26", "r27", "r28", "r29", \
"cr2", "cr3", "cr4"
static int
slp_switch(void)
{
int err;
int *stackref, stsizediff;
__asm__ volatile ("" : : : REGS_TO_SAVE);
__asm__ ("mr %0, 1" : "=r" (stackref) : );
{
SLP_SAVE_STATE(stackref, stsizediff);
__asm__ volatile (
"mr 11, %0\n"
"add 1, 1, 11\n"
"add 30, 30, 11\n"
: /* no outputs */
: "r" (stsizediff)
: "11"
);
SLP_RESTORE_STATE();
}
__asm__ volatile ("" : : : REGS_TO_SAVE);
__asm__ volatile ("li %0, 0" : "=r" (err));
return err;
}
#endif
/*
* further self-processing support
*/
/*
* if you want to add self-inspection tools, place them
* here. See the x86_msvc for the necessary defines.
* These features are highly experimental und not
* essential yet.
*/

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#define STACK_REFPLUS 1
#ifdef SLP_EVAL
#define STACK_MAGIC 0
#define REGS_TO_SAVE "s1", "s2", "s3", "s4", "s5", \
"s6", "s7", "s8", "s9", "s10", "s11", "fs0", "fs1", \
"fs2", "fs3", "fs4", "fs5", "fs6", "fs7", "fs8", "fs9", \
"fs10", "fs11"
static int
slp_switch(void)
{
long fp;
int ret;
long *stackref, stsizediff;
__asm__ volatile ("" : : : REGS_TO_SAVE);
__asm__ volatile ("mv %0, fp" : "=r" (fp) : );
__asm__ volatile ("mv %0, sp" : "=r" (stackref) : );
{
SLP_SAVE_STATE(stackref, stsizediff);
__asm__ volatile (
"add sp, sp, %0\n\t"
"add fp, fp, %0\n\t"
: /* no outputs */
: "r" (stsizediff)
);
SLP_RESTORE_STATE();
}
__asm__ volatile ("" : : : REGS_TO_SAVE);
__asm__ volatile ("ld fp, %0" : : "m" (fp));
__asm__ volatile ("mv %0, zero" : "=r" (ret) : );
return ret;
}
#endif

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/*
* this is the internal transfer function.
*
* HISTORY
* 25-Jan-12 Alexey Borzenkov <snaury@gmail.com>
* Fixed Linux/S390 port to work correctly with
* different optimization options both on 31-bit
* and 64-bit. Thanks to Stefan Raabe for lots
* of testing.
* 24-Nov-02 Christian Tismer <tismer@tismer.com>
* needed to add another magic constant to insure
* that f in slp_eval_frame(PyFrameObject *f)
* STACK_REFPLUS will probably be 1 in most cases.
* gets included into the saved stack area.
* 06-Oct-02 Gustavo Niemeyer <niemeyer@conectiva.com>
* Ported to Linux/S390.
*/
#define STACK_REFPLUS 1
#ifdef SLP_EVAL
#ifdef __s390x__
#define STACK_MAGIC 20 /* 20 * 8 = 160 bytes of function call area */
#else
#define STACK_MAGIC 24 /* 24 * 4 = 96 bytes of function call area */
#endif
/* Technically, r11-r13 also need saving, but function prolog starts
with stm(g) and since there are so many saved registers already
it won't be optimized, resulting in all r6-r15 being saved */
#define REGS_TO_SAVE "r6", "r7", "r8", "r9", "r10", "r14", \
"f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
"f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15"
static int
slp_switch(void)
{
int ret;
long *stackref, stsizediff;
__asm__ volatile ("" : : : REGS_TO_SAVE);
#ifdef __s390x__
__asm__ volatile ("lgr %0, 15" : "=r" (stackref) : );
#else
__asm__ volatile ("lr %0, 15" : "=r" (stackref) : );
#endif
{
SLP_SAVE_STATE(stackref, stsizediff);
/* N.B.
r11 may be used as the frame pointer, and in that case it cannot be
clobbered and needs offsetting just like the stack pointer (but in cases
where frame pointer isn't used we might clobber it accidentally). What's
scary is that r11 is 2nd (and even 1st when GOT is used) callee saved
register that gcc would chose for surviving function calls. However,
since r6-r10 are clobbered above, their cost for reuse is reduced, so
gcc IRA will chose them over r11 (not seeing r11 is implicitly saved),
making it relatively safe to offset in all cases. :) */
__asm__ volatile (
#ifdef __s390x__
"agr 15, %0\n\t"
"agr 11, %0"
#else
"ar 15, %0\n\t"
"ar 11, %0"
#endif
: /* no outputs */
: "r" (stsizediff)
);
SLP_RESTORE_STATE();
}
__asm__ volatile ("" : : : REGS_TO_SAVE);
__asm__ volatile ("lhi %0, 0" : "=r" (ret) : );
return ret;
}
#endif
/*
* further self-processing support
*/
/*
* if you want to add self-inspection tools, place them
* here. See the x86_msvc for the necessary defines.
* These features are highly experimental und not
* essential yet.
*/

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#define STACK_REFPLUS 1
#ifdef SLP_EVAL
#define STACK_MAGIC 0
#define REGS_TO_SAVE "r8", "r9", "r10", "r11", "r13", \
"fr12", "fr13", "fr14", "fr15"
// r12 Global context pointer, GP
// r14 Frame pointer, FP
// r15 Stack pointer, SP
static int
slp_switch(void)
{
int err;
void* fp;
int *stackref, stsizediff;
__asm__ volatile("" : : : REGS_TO_SAVE);
__asm__ volatile("mov.l r14, %0" : "=m"(fp) : :);
__asm__("mov r15, %0" : "=r"(stackref));
{
SLP_SAVE_STATE(stackref, stsizediff);
__asm__ volatile(
"add %0, r15\n"
"add %0, r14\n"
: /* no outputs */
: "r"(stsizediff));
SLP_RESTORE_STATE();
__asm__ volatile("mov r0, %0" : "=r"(err) : :);
}
__asm__ volatile("mov.l %0, r14" : : "m"(fp) :);
__asm__ volatile("" : : : REGS_TO_SAVE);
return err;
}
#endif

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/*
* this is the internal transfer function.
*
* HISTORY
* 16-May-15 Alexey Borzenkov <snaury@gmail.com>
* Move stack spilling code inside save/restore functions
* 30-Aug-13 Floris Bruynooghe <flub@devork.be>
Clean the register windows again before returning.
This does not clobber the PIC register as it leaves
the current window intact and is required for multi-
threaded code to work correctly.
* 08-Mar-11 Floris Bruynooghe <flub@devork.be>
* No need to set return value register explicitly
* before the stack and framepointer are adjusted
* as none of the other registers are influenced by
* this. Also don't needlessly clean the windows
* ('ta %0" :: "i" (ST_CLEAN_WINDOWS)') as that
* clobbers the gcc PIC register (%l7).
* 24-Nov-02 Christian Tismer <tismer@tismer.com>
* needed to add another magic constant to insure
* that f in slp_eval_frame(PyFrameObject *f)
* STACK_REFPLUS will probably be 1 in most cases.
* gets included into the saved stack area.
* 17-Sep-02 Christian Tismer <tismer@tismer.com>
* after virtualizing stack save/restore, the
* stack size shrunk a bit. Needed to introduce
* an adjustment STACK_MAGIC per platform.
* 15-Sep-02 Gerd Woetzel <gerd.woetzel@GMD.DE>
* added support for SunOS sparc with gcc
*/
#define STACK_REFPLUS 1
#ifdef SLP_EVAL
#define STACK_MAGIC 0
#if defined(__sparcv9)
#define SLP_FLUSHW __asm__ volatile ("flushw")
#else
#define SLP_FLUSHW __asm__ volatile ("ta 3") /* ST_FLUSH_WINDOWS */
#endif
/* On sparc we need to spill register windows inside save/restore functions */
#define SLP_BEFORE_SAVE_STATE() SLP_FLUSHW
#define SLP_BEFORE_RESTORE_STATE() SLP_FLUSHW
static int
slp_switch(void)
{
int err;
int *stackref, stsizediff;
/* Put current stack pointer into stackref.
* Register spilling is done in save/restore.
*/
__asm__ volatile ("mov %%sp, %0" : "=r" (stackref));
{
/* Thou shalt put SLP_SAVE_STATE into a local block */
/* Copy the current stack onto the heap */
SLP_SAVE_STATE(stackref, stsizediff);
/* Increment stack and frame pointer by stsizediff */
__asm__ volatile (
"add %0, %%sp, %%sp\n\t"
"add %0, %%fp, %%fp"
: : "r" (stsizediff));
/* Copy new stack from it's save store on the heap */
SLP_RESTORE_STATE();
__asm__ volatile ("mov %1, %0" : "=r" (err) : "i" (0));
return err;
}
}
#endif
/*
* further self-processing support
*/
/*
* if you want to add self-inspection tools, place them
* here. See the x86_msvc for the necessary defines.
* These features are highly experimental und not
* essential yet.
*/

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/*
* this is the internal transfer function.
*
* HISTORY
* 17-Aug-12 Fantix King <fantix.king@gmail.com>
* Ported from amd64.
*/
#define STACK_REFPLUS 1
#ifdef SLP_EVAL
#define STACK_MAGIC 0
#define REGS_TO_SAVE "r12", "r13", "r14", "r15"
static int
slp_switch(void)
{
void* ebp;
void* ebx;
unsigned int csr;
unsigned short cw;
int err;
int *stackref, stsizediff;
__asm__ volatile ("" : : : REGS_TO_SAVE);
__asm__ volatile ("fstcw %0" : "=m" (cw));
__asm__ volatile ("stmxcsr %0" : "=m" (csr));
__asm__ volatile ("movl %%ebp, %0" : "=m" (ebp));
__asm__ volatile ("movl %%ebx, %0" : "=m" (ebx));
__asm__ ("movl %%esp, %0" : "=g" (stackref));
{
SLP_SAVE_STATE(stackref, stsizediff);
__asm__ volatile (
"addl %0, %%esp\n"
"addl %0, %%ebp\n"
:
: "r" (stsizediff)
);
SLP_RESTORE_STATE();
}
__asm__ volatile ("movl %0, %%ebx" : : "m" (ebx));
__asm__ volatile ("movl %0, %%ebp" : : "m" (ebp));
__asm__ volatile ("ldmxcsr %0" : : "m" (csr));
__asm__ volatile ("fldcw %0" : : "m" (cw));
__asm__ volatile ("" : : : REGS_TO_SAVE);
__asm__ volatile ("xorl %%eax, %%eax" : "=a" (err));
return err;
}
#endif
/*
* further self-processing support
*/
/*
* if you want to add self-inspection tools, place them
* here. See the x86_msvc for the necessary defines.
* These features are highly experimental und not
* essential yet.
*/

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;
; stack switching code for MASM on x641
; Kristjan Valur Jonsson, sept 2005
;
;prototypes for our calls
slp_save_state_asm PROTO
slp_restore_state_asm PROTO
pushxmm MACRO reg
sub rsp, 16
.allocstack 16
movaps [rsp], reg ; faster than movups, but we must be aligned
; .savexmm128 reg, offset (don't know what offset is, no documentation)
ENDM
popxmm MACRO reg
movaps reg, [rsp] ; faster than movups, but we must be aligned
add rsp, 16
ENDM
pushreg MACRO reg
push reg
.pushreg reg
ENDM
popreg MACRO reg
pop reg
ENDM
.code
slp_switch PROC FRAME
;realign stack to 16 bytes after return address push, makes the following faster
sub rsp,8
.allocstack 8
pushxmm xmm15
pushxmm xmm14
pushxmm xmm13
pushxmm xmm12
pushxmm xmm11
pushxmm xmm10
pushxmm xmm9
pushxmm xmm8
pushxmm xmm7
pushxmm xmm6
pushreg r15
pushreg r14
pushreg r13
pushreg r12
pushreg rbp
pushreg rbx
pushreg rdi
pushreg rsi
sub rsp, 10h ;allocate the singlefunction argument (must be multiple of 16)
.allocstack 10h
.endprolog
lea rcx, [rsp+10h] ;load stack base that we are saving
call slp_save_state_asm ;pass stackpointer, return offset in eax
cmp rax, 1
je EXIT1
cmp rax, -1
je EXIT2
;actual stack switch:
add rsp, rax
call slp_restore_state_asm
xor rax, rax ;return 0
EXIT:
add rsp, 10h
popreg rsi
popreg rdi
popreg rbx
popreg rbp
popreg r12
popreg r13
popreg r14
popreg r15
popxmm xmm6
popxmm xmm7
popxmm xmm8
popxmm xmm9
popxmm xmm10
popxmm xmm11
popxmm xmm12
popxmm xmm13
popxmm xmm14
popxmm xmm15
add rsp, 8
ret
EXIT1:
mov rax, 1
jmp EXIT
EXIT2:
sar rax, 1
jmp EXIT
slp_switch ENDP
END

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/*
* this is the internal transfer function.
*
* HISTORY
* 24-Nov-02 Christian Tismer <tismer@tismer.com>
* needed to add another magic constant to insure
* that f in slp_eval_frame(PyFrameObject *f)
* STACK_REFPLUS will probably be 1 in most cases.
* gets included into the saved stack area.
* 26-Sep-02 Christian Tismer <tismer@tismer.com>
* again as a result of virtualized stack access,
* the compiler used less registers. Needed to
* explicit mention registers in order to get them saved.
* Thanks to Jeff Senn for pointing this out and help.
* 17-Sep-02 Christian Tismer <tismer@tismer.com>
* after virtualizing stack save/restore, the
* stack size shrunk a bit. Needed to introduce
* an adjustment STACK_MAGIC per platform.
* 15-Sep-02 Gerd Woetzel <gerd.woetzel@GMD.DE>
* slightly changed framework for sparc
* 01-Mar-02 Christian Tismer <tismer@tismer.com>
* Initial final version after lots of iterations for i386.
*/
/* Avoid alloca redefined warning on mingw64 */
#ifndef alloca
#define alloca _alloca
#endif
#define STACK_REFPLUS 1
#define STACK_MAGIC 0
/* Use the generic support for an external assembly language slp_switch function. */
#define EXTERNAL_ASM
#ifdef SLP_EVAL
/* This always uses the external masm assembly file. */
#endif
/*
* further self-processing support
*/
/* we have IsBadReadPtr available, so we can peek at objects */
/*
#define STACKLESS_SPY
#ifdef IMPLEMENT_STACKLESSMODULE
#include "Windows.h"
#define CANNOT_READ_MEM(p, bytes) IsBadReadPtr(p, bytes)
static int IS_ON_STACK(void*p)
{
int stackref;
intptr_t stackbase = ((intptr_t)&stackref) & 0xfffff000;
return (intptr_t)p >= stackbase && (intptr_t)p < stackbase + 0x00100000;
}
#endif
*/

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/*
* this is the internal transfer function.
*
* HISTORY
* 24-Nov-02 Christian Tismer <tismer@tismer.com>
* needed to add another magic constant to insure
* that f in slp_eval_frame(PyFrameObject *f)
* STACK_REFPLUS will probably be 1 in most cases.
* gets included into the saved stack area.
* 26-Sep-02 Christian Tismer <tismer@tismer.com>
* again as a result of virtualized stack access,
* the compiler used less registers. Needed to
* explicit mention registers in order to get them saved.
* Thanks to Jeff Senn for pointing this out and help.
* 17-Sep-02 Christian Tismer <tismer@tismer.com>
* after virtualizing stack save/restore, the
* stack size shrunk a bit. Needed to introduce
* an adjustment STACK_MAGIC per platform.
* 15-Sep-02 Gerd Woetzel <gerd.woetzel@GMD.DE>
* slightly changed framework for sparc
* 01-Mar-02 Christian Tismer <tismer@tismer.com>
* Initial final version after lots of iterations for i386.
*/
#define alloca _alloca
#define STACK_REFPLUS 1
#ifdef SLP_EVAL
#define STACK_MAGIC 0
/* Some magic to quell warnings and keep slp_switch() from crashing when built
with VC90. Disable global optimizations, and the warning: frame pointer
register 'ebp' modified by inline assembly code.
We used to just disable global optimizations ("g") but upstream stackless
Python, as well as stackman, turn off all optimizations.
References:
https://github.com/stackless-dev/stackman/blob/dbc72fe5207a2055e658c819fdeab9731dee78b9/stackman/platforms/switch_x86_msvc.h
https://github.com/stackless-dev/stackless/blob/main-slp/Stackless/platf/switch_x86_msvc.h
*/
#define WIN32_LEAN_AND_MEAN
#include <windows.h>
#pragma optimize("", off) /* so that autos are stored on the stack */
#pragma warning(disable:4731)
#pragma warning(disable:4733) /* disable warning about modifying FS[0] */
/**
* Most modern compilers and environments handle C++ exceptions without any
* special help from us. MSVC on 32-bit windows is an exception. There, C++
* exceptions are dealt with using Windows' Structured Exception Handling
* (SEH).
*
* SEH is implemented as a singly linked list of <function*, prev*> nodes. The
* head of this list is stored in the Thread Information Block, which itself
* is pointed to from the FS register. It's the first field in the structure,
* or offset 0, so we can access it using assembly FS:[0], or the compiler
* intrinsics and field offset information from the headers (as we do below).
* Somewhat unusually, the tail of the list doesn't have prev == NULL, it has
* prev == 0xFFFFFFFF.
*
* SEH was designed for C, and traditionally uses the MSVC compiler
* intrinsincs __try{}/__except{}. It is also utilized for C++ exceptions by
* MSVC; there, every throw of a C++ exception raises a SEH error with the
* ExceptionCode 0xE06D7363; the SEH handler list is then traversed to
* deal with the exception.
*
* If the SEH list is corrupt, then when a C++ exception is thrown the program
* will abruptly exit with exit code 1. This does not use std::terminate(), so
* std::set_terminate() is useless to debug this.
*
* The SEH list is closely tied to the call stack; entering a function that
* uses __try{} or most C++ functions will push a new handler onto the front
* of the list. Returning from the function will remove the handler. Saving
* and restoring the head node of the SEH list (FS:[0]) per-greenlet is NOT
* ENOUGH to make SEH or exceptions work.
*
* Stack switching breaks SEH because the call stack no longer necessarily
* matches the SEH list. For example, given greenlet A that switches to
* greenlet B, at the moment of entering greenlet B, we will have any SEH
* handlers from greenlet A on the SEH list; greenlet B can then add its own
* handlers to the SEH list. When greenlet B switches back to greenlet A,
* greenlet B's handlers would still be on the SEH stack, but when switch()
* returns control to greenlet A, we have replaced the contents of the stack
* in memory, so all the address that greenlet B added to the SEH list are now
* invalid: part of the call stack has been unwound, but the SEH list was out
* of sync with the call stack. The net effect is that exception handling
* stops working.
*
* Thus, when switching greenlets, we need to be sure that the SEH list
* matches the effective call stack, "cutting out" any handlers that were
* pushed by the greenlet that switched out and which are no longer valid.
*
* The easiest way to do this is to capture the SEH list at the time the main
* greenlet for a thread is created, and, when initially starting a greenlet,
* start a new SEH list for it, which contains nothing but the handler
* established for the new greenlet itself, with the tail being the handlers
* for the main greenlet. If we then save and restore the SEH per-greenlet,
* they won't interfere with each others SEH lists. (No greenlet can unwind
* the call stack past the handlers established by the main greenlet).
*
* By observation, a new thread starts with three SEH handlers on the list. By
* the time we get around to creating the main greenlet, though, there can be
* many more, established by transient calls that lead to the creation of the
* main greenlet. Therefore, 3 is a magic constant telling us when to perform
* the initial slice.
*
* All of this can be debugged using a vectored exception handler, which
* operates independently of the SEH handler list, and is called first.
* Walking the SEH list at key points can also be helpful.
*
* References:
* https://en.wikipedia.org/wiki/Win32_Thread_Information_Block
* https://devblogs.microsoft.com/oldnewthing/20100730-00/?p=13273
* https://docs.microsoft.com/en-us/cpp/cpp/try-except-statement?view=msvc-160
* https://docs.microsoft.com/en-us/cpp/cpp/structured-exception-handling-c-cpp?view=msvc-160
* https://docs.microsoft.com/en-us/windows/win32/debug/structured-exception-handling
* https://docs.microsoft.com/en-us/windows/win32/debug/using-a-vectored-exception-handler
* https://bytepointer.com/resources/pietrek_crash_course_depths_of_win32_seh.htm
*/
#define GREENLET_NEEDS_EXCEPTION_STATE_SAVED
typedef struct _GExceptionRegistration {
struct _GExceptionRegistration* prev;
void* handler_f;
} GExceptionRegistration;
static void
slp_set_exception_state(const void *const seh_state)
{
// Because the stack from from which we do this is ALSO a handler, and
// that one we want to keep, we need to relink the current SEH handler
// frame to point to this one, cutting out the middle men, as it were.
//
// Entering a try block doesn't change the SEH frame, but entering a
// function containing a try block does.
GExceptionRegistration* current_seh_state = (GExceptionRegistration*)__readfsdword(FIELD_OFFSET(NT_TIB, ExceptionList));
current_seh_state->prev = (GExceptionRegistration*)seh_state;
}
static GExceptionRegistration*
x86_slp_get_third_oldest_handler()
{
GExceptionRegistration* a = NULL; /* Closest to the top */
GExceptionRegistration* b = NULL; /* second */
GExceptionRegistration* c = NULL;
GExceptionRegistration* seh_state = (GExceptionRegistration*)__readfsdword(FIELD_OFFSET(NT_TIB, ExceptionList));
a = b = c = seh_state;
while (seh_state && seh_state != (GExceptionRegistration*)0xFFFFFFFF) {
if ((void*)seh_state->prev < (void*)100) {
fprintf(stderr, "\tERROR: Broken SEH chain.\n");
return NULL;
}
a = b;
b = c;
c = seh_state;
seh_state = seh_state->prev;
}
return a ? a : (b ? b : c);
}
static void*
slp_get_exception_state()
{
// XXX: There appear to be three SEH handlers on the stack already at the
// start of the thread. Is that a guarantee? Almost certainly not. Yet in
// all observed cases it has been three. This is consistent with
// faulthandler off or on, and optimizations off or on. It may not be
// consistent with other operating system versions, though: we only have
// CI on one or two versions (don't ask what there are).
// In theory we could capture the number of handlers on the chain when
// PyInit__greenlet is called: there are probably only the default
// handlers at that point (unless we're embedded and people have used
// __try/__except or a C++ handler)?
return x86_slp_get_third_oldest_handler();
}
static int
slp_switch(void)
{
/* MASM syntax is typically reversed from other assemblers.
It is usually <instruction> <destination> <source>
*/
int *stackref, stsizediff;
/* store the structured exception state for this stack */
DWORD seh_state = __readfsdword(FIELD_OFFSET(NT_TIB, ExceptionList));
__asm mov stackref, esp;
/* modify EBX, ESI and EDI in order to get them preserved */
__asm mov ebx, ebx;
__asm xchg esi, edi;
{
SLP_SAVE_STATE(stackref, stsizediff);
__asm {
mov eax, stsizediff
add esp, eax
add ebp, eax
}
SLP_RESTORE_STATE();
}
__writefsdword(FIELD_OFFSET(NT_TIB, ExceptionList), seh_state);
return 0;
}
/* re-enable ebp warning and global optimizations. */
#pragma optimize("", on)
#pragma warning(default:4731)
#pragma warning(default:4733) /* disable warning about modifying FS[0] */
#endif
/*
* further self-processing support
*/
/* we have IsBadReadPtr available, so we can peek at objects */
#define STACKLESS_SPY
#ifdef GREENLET_DEBUG
#define CANNOT_READ_MEM(p, bytes) IsBadReadPtr(p, bytes)
static int IS_ON_STACK(void*p)
{
int stackref;
int stackbase = ((int)&stackref) & 0xfffff000;
return (int)p >= stackbase && (int)p < stackbase + 0x00100000;
}
static void
x86_slp_show_seh_chain()
{
GExceptionRegistration* seh_state = (GExceptionRegistration*)__readfsdword(FIELD_OFFSET(NT_TIB, ExceptionList));
fprintf(stderr, "====== SEH Chain ======\n");
while (seh_state && seh_state != (GExceptionRegistration*)0xFFFFFFFF) {
fprintf(stderr, "\tSEH_chain addr: %p handler: %p prev: %p\n",
seh_state,
seh_state->handler_f, seh_state->prev);
if ((void*)seh_state->prev < (void*)100) {
fprintf(stderr, "\tERROR: Broken chain.\n");
break;
}
seh_state = seh_state->prev;
}
fprintf(stderr, "====== End SEH Chain ======\n");
fflush(NULL);
return;
}
//addVectoredExceptionHandler constants:
//CALL_FIRST means call this exception handler first;
//CALL_LAST means call this exception handler last
#define CALL_FIRST 1
#define CALL_LAST 0
LONG WINAPI
GreenletVectorHandler(PEXCEPTION_POINTERS ExceptionInfo)
{
// We get one of these for every C++ exception, with code
// E06D7363
// This is a special value that means "C++ exception from MSVC"
// https://devblogs.microsoft.com/oldnewthing/20100730-00/?p=13273
//
// Install in the module init function with:
// AddVectoredExceptionHandler(CALL_FIRST, GreenletVectorHandler);
PEXCEPTION_RECORD ExceptionRecord = ExceptionInfo->ExceptionRecord;
fprintf(stderr,
"GOT VECTORED EXCEPTION:\n"
"\tExceptionCode : %p\n"
"\tExceptionFlags : %p\n"
"\tExceptionAddr : %p\n"
"\tNumberparams : %ld\n",
ExceptionRecord->ExceptionCode,
ExceptionRecord->ExceptionFlags,
ExceptionRecord->ExceptionAddress,
ExceptionRecord->NumberParameters
);
if (ExceptionRecord->ExceptionFlags & 1) {
fprintf(stderr, "\t\tEH_NONCONTINUABLE\n" );
}
if (ExceptionRecord->ExceptionFlags & 2) {
fprintf(stderr, "\t\tEH_UNWINDING\n" );
}
if (ExceptionRecord->ExceptionFlags & 4) {
fprintf(stderr, "\t\tEH_EXIT_UNWIND\n" );
}
if (ExceptionRecord->ExceptionFlags & 8) {
fprintf(stderr, "\t\tEH_STACK_INVALID\n" );
}
if (ExceptionRecord->ExceptionFlags & 0x10) {
fprintf(stderr, "\t\tEH_NESTED_CALL\n" );
}
if (ExceptionRecord->ExceptionFlags & 0x20) {
fprintf(stderr, "\t\tEH_TARGET_UNWIND\n" );
}
if (ExceptionRecord->ExceptionFlags & 0x40) {
fprintf(stderr, "\t\tEH_COLLIDED_UNWIND\n" );
}
fprintf(stderr, "\n");
fflush(NULL);
for(DWORD i = 0; i < ExceptionRecord->NumberParameters; i++) {
fprintf(stderr, "\t\t\tParam %ld: %lX\n", i, ExceptionRecord->ExceptionInformation[i]);
}
if (ExceptionRecord->NumberParameters == 3) {
fprintf(stderr, "\tAbout to traverse SEH chain\n");
// C++ Exception records have 3 params.
x86_slp_show_seh_chain();
}
return EXCEPTION_CONTINUE_SEARCH;
}
#endif

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/*
* this is the internal transfer function.
*
* HISTORY
* 3-May-13 Ralf Schmitt <ralf@systemexit.de>
* Add support for strange GCC caller-save decisions
* (ported from switch_aarch64_gcc.h)
* 19-Aug-11 Alexey Borzenkov <snaury@gmail.com>
* Correctly save ebp, ebx and cw
* 07-Sep-05 (py-dev mailing list discussion)
* removed 'ebx' from the register-saved. !!!! WARNING !!!!
* It means that this file can no longer be compiled statically!
* It is now only suitable as part of a dynamic library!
* 24-Nov-02 Christian Tismer <tismer@tismer.com>
* needed to add another magic constant to insure
* that f in slp_eval_frame(PyFrameObject *f)
* STACK_REFPLUS will probably be 1 in most cases.
* gets included into the saved stack area.
* 17-Sep-02 Christian Tismer <tismer@tismer.com>
* after virtualizing stack save/restore, the
* stack size shrunk a bit. Needed to introduce
* an adjustment STACK_MAGIC per platform.
* 15-Sep-02 Gerd Woetzel <gerd.woetzel@GMD.DE>
* slightly changed framework for spark
* 31-Avr-02 Armin Rigo <arigo@ulb.ac.be>
* Added ebx, esi and edi register-saves.
* 01-Mar-02 Samual M. Rushing <rushing@ironport.com>
* Ported from i386.
*/
#define STACK_REFPLUS 1
#ifdef SLP_EVAL
/* #define STACK_MAGIC 3 */
/* the above works fine with gcc 2.96, but 2.95.3 wants this */
#define STACK_MAGIC 0
#if __GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
# define ATTR_NOCLONE __attribute__((noclone))
#else
# define ATTR_NOCLONE
#endif
static int
slp_switch(void)
{
int err;
#ifdef _WIN32
void *seh;
#endif
void *ebp, *ebx;
unsigned short cw;
int *stackref, stsizediff;
__asm__ volatile ("" : : : "esi", "edi");
__asm__ volatile ("fstcw %0" : "=m" (cw));
__asm__ volatile ("movl %%ebp, %0" : "=m" (ebp));
__asm__ volatile ("movl %%ebx, %0" : "=m" (ebx));
#ifdef _WIN32
__asm__ volatile (
"movl %%fs:0x0, %%eax\n"
"movl %%eax, %0\n"
: "=m" (seh)
:
: "eax");
#endif
__asm__ ("movl %%esp, %0" : "=g" (stackref));
{
SLP_SAVE_STATE(stackref, stsizediff);
__asm__ volatile (
"addl %0, %%esp\n"
"addl %0, %%ebp\n"
:
: "r" (stsizediff)
);
SLP_RESTORE_STATE();
__asm__ volatile ("xorl %%eax, %%eax" : "=a" (err));
}
#ifdef _WIN32
__asm__ volatile (
"movl %0, %%eax\n"
"movl %%eax, %%fs:0x0\n"
:
: "m" (seh)
: "eax");
#endif
__asm__ volatile ("movl %0, %%ebx" : : "m" (ebx));
__asm__ volatile ("movl %0, %%ebp" : : "m" (ebp));
__asm__ volatile ("fldcw %0" : : "m" (cw));
__asm__ volatile ("" : : : "esi", "edi");
return err;
}
#endif
/*
* further self-processing support
*/
/*
* if you want to add self-inspection tools, place them
* here. See the x86_msvc for the necessary defines.
* These features are highly experimental und not
* essential yet.
*/